The Transistor That Keeps Working at 600°C

The useful question about a very hot transistor is not simply whether it survives. It is whether an engineer can still predict what it will do. A sensor near a turbine or deep in a geothermal well needs electronics that can distinguish the intended signal from unwanted current, repeatedly and reliably.

Kyoto University researchers have demonstrated a silicon-carbide junction field-effect transistor operating at 600°C. Their advance combines a more predictable gate structure with electrical isolation that suppresses leakage at high temperature. It is a device-level result measured in vacuum, not a completed computer qualified for continuous service at that temperature.^[1][3]

The team includes associate professor Mitsuaki Kaneko, Shunya Shibata, who was a master’s student during the research, and professor Tsunenobu Kimoto. The work appears in APL Electronic Devices, and Kyoto’s engineering school announced it on August 19.^[1][4][5]

Heat changes the electrical rules

Electronics can lose useful behaviour long before their constituent materials melt. Heat increases the availability of charge carriers and can open unwanted current paths. A transistor that cannot be turned effectively off may remain physically intact while becoming unsuitable for its intended circuit.

Silicon carbide, or SiC, has a wider bandgap than silicon: a larger energy separation between electronic states relevant to conduction. That gives it an advantage for high-temperature devices. But the material does not automatically confer its best properties on every junction, contact or package made around it. Kyoto’s laboratory treats material control and device design as connected research problems.^[6]

The university uses roughly 250°C as an illustrative limit for conventional silicon integrated circuits. That is not a permitted operating temperature for an ordinary commercial chip. Product ratings depend on the device and its construction; a material-level comparison should never be mistaken for a component specification.^[1]

A junction controls the channel

A JFET controls current through a channel by changing the depletion region around a p–n junction. As that region expands, it restricts the conducting path. Unlike a MOSFET gate, this control mechanism does not depend on a gate oxide. The Kyoto paper identifies that distinction as attractive for high-temperature stability.^[3]

The threshold voltage is a crucial design parameter. If it differs substantially from what the engineer expects, combining many transistors becomes difficult. Circuit design requires more than evidence that an isolated device responds to voltage; it requires a reasonably dependable relationship between the intended structure and its electrical behaviour.

The ions that travel too far

The team fabricated doped regions by ion implantation, using aluminium and phosphorus to form p-type and n-type regions. This familiar semiconductor-processing method has an inconvenient complication in a crystal: some ions travel farther along crystallographic directions than a simple implantation model predicts. That channeling changes the dopant profile.^[3]

The researchers put the gate region below the channel. In this bottom-gate arrangement, dopants in the gate compensate the deeper implantation tail, helping the actual channel approach the designed one. They compared calculated profiles with measurements obtained by secondary-ion mass spectrometry.^[3]

The widely reported 0.1-volt result needs careful reading. At 400°C, the difference between the designed and measured threshold of a bottom-gate n-channel device was less than 0.1 V. Its measured threshold itself was approximately −51.7 V. The small number describes agreement with a design, not low-voltage operation or a threshold that remains unchanged as temperature rises.^[3]

That is a useful achievement on its own terms. Predictability is a prerequisite for optimisation. It does not mean that this proof-of-concept transistor already has the voltage requirements desired for a low-power product.

Closing the path underneath

The second problem lies below the controlled channel. A semi-insulating substrate becomes less resistive at elevated temperature as carriers are thermally released from deep levels. Current can then bypass the intended control mechanism through the substrate.^[3]

Kyoto instead incorporated a bottom-gate p-channel transistor into an implanted double-well structure on an n-type epitaxial layer. The p–n junction isolation suppresses the unwanted path without relying solely on the substrate remaining highly resistive.^[3]

This p-channel device supplied the detailed 600°C demonstration. Its measured characteristics retained linear and saturation regions, and its on/off current ratio exceeded 1,000 under the paper’s defined conditions. The n-channel threshold comparison and the double-well p-channel temperature result are separate experiments; they should not be collapsed into a single device specification.^[3]

The authors interpret the remaining leakage as approaching behaviour governed by intrinsic carrier generation, while also discussing possible defect-assisted generation and surface leakage. Their analysis does not establish zero leakage or a universal lower limit for every operating condition.^[3]

What the experiment actually endured

The paper describes electrical characterisation on a temperature-controlled probe station in vacuum. That is a strong basis for a device-physics result, but it is different from years of operation in air, repeated thermal cycling or exposure to a planetary atmosphere. The headline temperature identifies a demonstrated condition, not a service-life guarantee.^[3]

This is also why “standard manufacturing” needs qualification. Ion implantation is an established industrial technique, yet the double-well fabrication used implantation energies reaching 5 MeV for phosphorus and 7 MeV for aluminium, followed by a 1,750°C activation anneal lasting ten minutes. The experiment does not establish a process that any existing chip factory can adopt unchanged.^[3]

Reproducibility, equipment availability, yield and packaging would all enter a manufacturing assessment. A promising relationship with industrial processing is valuable without being equivalent to demonstrated low-cost mass production.

A material with a long apprenticeship

SiC’s promise preceded its practical success by decades. A 2020 historical review in the Proceedings of the Japan Academy traces Kyoto research beginning in 1968 and the development of step-controlled epitaxy in the late 1980s. Controlling growth at surface steps helped produce useful layers with the substrate’s crystal structure.^[7]

That history connects today’s transistor to a broader lesson in semiconductor engineering. Knowing that a material should perform well is different from controlling its crystal quality, dopants and interfaces sufficiently to make a repeatable device. Each generation of fabrication work turns more of the theoretical promise into something measurable.

High-temperature SiC circuits also have an established international history. A NASA report from 2017 describes more than 5,000 hours at 500°C for integrated circuits containing over 100 transistors. NASA’s 2020 Venus-electronics white paper discusses demonstrations exceeding a year at 500°C and 60 days in simulated Venus-surface conditions.^[8][9]

Those results should not be ranked against Kyoto’s by temperature alone. Duration, circuit complexity, atmosphere and fabrication method answer different questions. Kyoto’s contribution concerns two obstacles in implantation-based JFET design. It does not establish that earlier high-temperature electronics have been surpassed on every measure.

Venus makes the problem vivid

Venus has surface temperatures around 460°C and atmospheric pressure roughly 90 times Earth’s at sea level. Heat is therefore only one part of designing a long-lived instrument there. Pressure, chemistry, power, interconnections and communications must also be addressed.^[10]

NASA’s work on high-temperature electronics treats the circuit as part of a larger observing system, including sensors and supporting functions. A more durable transistor may remove an important constraint, but it cannot by itself deliver an operating lander or determine how long a complete mission will last.^[8]

Terrestrial applications could be equally significant. Kyoto identifies turbine monitoring and geothermal borehole sensing as potential uses. Processing a signal closer to a hot measurement point could reduce dependence on remote electronics and elaborate connections. The study, however, does not measure a particular improvement in engine efficiency or geothermal output.^[2]

The next challenge is a circuit that lasts

The demonstrated devices were designed for normally-on operation. With an appropriate source–drain bias, they conduct at zero gate-to-source control voltage. They are not yet the normally-off devices sought for the team’s low-power complementary JFET circuits, which would combine n-channel and p-channel elements.^[2][3]

The university explicitly identifies long-duration reliability and heat-resistant packages and wiring as further work. Useful next evidence would connect electrical performance to elapsed time, repeated heating and cooling, and the atmosphere of the intended application. A transistor cannot deliver reliable measurements if its connections fail first.^[2]

Japan.co.jp’s assessment is that the strength of the result lies in making extreme-temperature electronics more designable. A gate whose behaviour follows its intended structure, together with isolation that still works in the heat, gives circuit engineers a firmer starting point. The next milestone will be showing how those gains persist when individual devices become an operating system.